Conventional real-time profiling solutions, such as Nexus and ETM, involve adding large FIFO buffers and/or logic to compress trace data in order overcome data rate issues. Many applications for a digital signal processor (DSP) use a specific environment of input/output data and data execution timing for running in real-time. Conventional profiling approaches do not allow profiling of such applications in real-time.
Profiling is a method to generate run-time statistics for each procedure in an application. For example, profiling methods are used to evaluate how long a computer code process takes to execute. Profiling methods are also used to determine memory allocation requirements. Based on the profiling statistics, the application execution speed of a DSP can be optimized.
Profiling uses instruction trace data along with a cycle counter to calculate the execution statistics. A profiler can identify processor bottlenecks and provide clues for optimization options. A profiler provides insight into the operation of a system by monitoring CPU clock cycles. In conventional DSP chips, instruction trace data is collected in an on-chip trace buffer. If the trace buffer is full, a debugger running on a host PC stops execution of the application, outputs the trace data, and empties the trace buffer. Afterwards, application execution is resumed. The debugger calculates the profile statistics based on the gathered trace data. Such an approach frequently stops execution and therefore does not work for real-time applications, such as media gateways and base bands.
It would be desirable to implement a system and/or circuit that provides real-time profiling for data execution timing and/or bandwidth issues while minimizing logic added to a DSP chip.